The present invention relates to modulation techniques, and, in particular, to an innovative and economical frequency shift key (FSK) modulation technique. A typical, low-cost FSK modulator is implemented by injecting a modulation voltage into a phase lock loop (PLL) of a carrier synthesizer. This is generally done in two ways. The first way is summing the modulation voltage and the loop error voltage together and applying that to a voltage controlled oscillator""s (VCO) tuning port. The second way is using a separate tuning port having lower sensitivity to voltage changes. The modulating data changes the carrier frequency by a predetermined amount. Such deviation of the carrier frequency causes error within the PLL which the PLL attempts to correct. The effect of the PLL correcting frequency errors caused by modulation is analogous to passing the modulation signal through a high-pass filter in which lower frequency components of the modulation signal are filtered out or eliminated. The result is unreliable communications for random data streams, especially for long strings of unchanged bits, which appear to have significant DC components.
There are several techniques that address this problem. One approach is to predistort the modulation signal to compensate for the effects of the PLL. Predistorting the modulation signal limits the frequency range of the modulator. Another commonly used method is to encode a data stream using techniques such as Manchester coding or split-phase coding. The basis of coding is to send two complementary symbols for every data bit; thus, a transition is guaranteed for every data bit. Such encoding techniques are rather simple. Typically, the data and a clock are exclusive-ORed together. Coding is very effective in that it configures the lowest frequency component of the modulation signal so that the PLL bandwidth has minimal effect on the coded data. Unfortunately, this effectively doubles the transmission data rate, which significantly increases channel bandwidth. Additionally, decoding the transmitted data is complicated.
Other FSK modulation approaches avoid these problems altogether by modulating outside of the PLL loop. For Example, FSK modulation is made possible by modulating the reference crystal. In a typical embodiment, a varactor is used to pull the center frequency of a crystal to the mark and space frequencies. Since the modulation occurs outside the loop, the PLL does not effect the modulation signal, it simply tracks the changes in the reference frequency. The pullability of the crystal limits frequency deviation and thus the maximum data rate. Given the variances in crystals and varactors, tuning is required to set the desired deviation. Yet another technique generates the reference frequency with a Direct Digital Synthesizer and modulates within the synthesizer. This technique is accurate and works very well, but is not economical. Thus, there is a need for an economical FSK modulation technique overcoming the deficiencies of the prior art.
The present invention provides an FSK modulation circuit and technique that controls a prescaler to generate an FSK output. In particular, a VCO output is sent to a prescaler controlled by a modulus control signal. The modulus control signal contains a series of pulses having a first duty cycle to effect a mark frequency and a second duty cycle to effect a space frequency. During a given cycle, the prescaler divides the VCO output frequency by two different divisors. The resulting frequency is compared with a reference frequency using a phase detector. Changing the duty cycle of the modulus control signal controlling the prescaler causes the VCO to provide a corresponding, synthesized frequency from the VCO for FSK modulation.
These and other aspects of the present invention will become apparent to those skilled in the art after reading the following description of the preferred embodiments when considered with the drawings.